文 件 列 表
max2work
chiptrip
edif
verilog
vhdl
ahdl
no1.acf
no3.rpt
no1.gdf
no3.sof
no1.cnf
no1.hif
no1.ndb
no3.pof
no3.hex
no3.ttf
no3.scf
U6190827.DLS
no3.sym
no3.mmf
clock.cnf
clock.acf
clock.v
clock.hif
clock.mmf
clock(8).cnf
clock.rpt
clock(1).cnf
clock(2).cnf
clock(3).cnf
no1.pin
clock(4).cnf
no1.fit
no1.snf
clock(5).cnf
no1.sof
no1.pof
no1.hex
no1.ttf
clock(6).cnf
no1.scf
clock(7).cnf
clock.ndb
clock.fit
clock.pin
clock.sof
clock.snf
clock1.v
clock.pof
clock.hex
clock.ttf
clock.scf
clock1.acf
clock1.scf
clock1.hif
clock-2.acf
clock-2.scf
clock-2.hif
clock2.acf
no1.mmf
U5752116.DLS
clock2.v
clock2.hif
U5834037.DLS
LIB.DLS
U7442682.DLS
clock(9).cnf
clock(10).cnf
clock(11).cnf
no1.rpt
no2.acf
no2.v
no2.hif
no2.mmf
U1593729.DLS
no3.acf
no3.tdf
no3.hif
no3.v
no3.cnf
no3.pin
no3.fit
no3.ndb
no3.snf
tutorial
read.me
readme.txt
tutorial
