资 源 简 介
基于FPGA平台的verilog语言编写的uart串口通信代码，可以实现发射和接收，并附有multism仿真代码。可以实现功能。Uart serial communication code written based on FPGA platform verilog language can realize transmit and receive, with multism simulation code. Can achieve the function.
文 件 列 表
uart_rx
db
doc
greybox_tmp
incremental_db
issp.qip
issp.v
issp_bb.v
output_files
uart_rx.qpf
uart_rx.qsf
uart_rx.qws
uart_rx.v
uart_rx.v.bak
uart_rx_nativelink_simulation.rpt
uart_rx_tb.v
uart_rx_tb.v.bak
uart_rx_top.v
uart_rx_top.v.bak
uart_tx.v
uart_tx
db
doc
greybox_tmp
incremental_db
issp.qip
issp.v
issp_bb.v
key_filter.v
output_files
uart_tx.qpf
uart_tx.qsf
uart_tx.qws
uart_tx.v
uart_tx.v.bak
uart_tx_nativelink_simulation.rpt
uart_tx_tb.v
uart_tx_tb.v.bak
uart_tx_top.v
uart_tx_top.v.bak
