资 源 简 介
FPGA的仿真实例，Verilog代码编写，过程详尽，代码易懂。第二个文档-FPGA simulation examples, Verilog coding, the process in detail, code easy to understand. The second document
文 件 列 表
key_debounce
key_debounce.v.bak
key_debounce.qpf
key_debounce.qsf
key_debounce.map.summary
key_debounce.done
key_debounce.map.rpt
key_debounce.pin
key_debounce.fit.smsg
key_debounce.fit.summary
key_debounce.fit.rpt
key_debounce.sof
key_debounce.pof
key_debounce.asm.rpt
key_debounce.tan.summary
key_debounce.tan.rpt
key_debounce.flow.rpt
key_debounce.v
key_debounce.qws
