资 源 简 介
在FPGA开发板显示字符串,采用VHDL语言,以简单的功能说明FPGA的开发流程.-In the FPGA development board shows the string, using VHDL language, in a simple functional description FPGA-development process.
文 件 列 表
hello_led
software
nios32_sim
db
nios32_generation_script
.sopc_builder
install.ptf
2C8v2_PIN.tcl
altpll0.bsf
altpll0.ppf
altpll0.v
altpll0_bb.v
altpll0_wave0.jpg
altpll0_waveforms.html
cpu.ocp
cpu.v
cpu_bht_ram.mif
cpu_dc_tag_ram.mif
cpu_ic_tag_ram.mif
cpu_jtag_debug_module.v
cpu_jtag_debug_module_wrapper.v
cpu_mult_cell.v
cpu_ociram_default_contents.mif
cpu_rf_ram_a.mif
cpu_rf_ram_b.mif
cpu_test_bench.v
jtag_uart.v
led.asm.rpt
led.bdf
led.cdf
led.done
led.fit.rpt
led.fit.smsg
led.fit.summary
led.flow.rpt
led.map.rpt
led.map.summary
led.pin
led.pof
led.qpf
led.qsf
led.qws
led.sof
led.tan.rpt
led.tan.summary
led_pio.v
nios32.bsf
nios32.ptf
nios32.v
nios32_log.txt
nios32_setup_quartus.tcl
RAM.hex
RAM.v
sopc_builder_debug_log.txt
.sopc_builder
