用verilog写的，基于查表法实现的LOG10运算器，在Altera FPGA中应用。-It is a verilog design of LOG10 calculation unit, which is based on LUT arithmatic. And it is applicated in Altera FPGA.
SHOW FULL COLUMNS FROM `jrk_downrecords` [ RunTime:0.002162s ]
SELECT `a`.`aid`,`a`.`title`,`a`.`create_time`,`m`.`username` FROM `jrk_downrecords` `a` INNER JOIN `jrk_member` `m` ON `a`.`uid`=`m`.`id` WHERE `a`.`status` = 1 GROUP BY `a`.`aid` ORDER BY `a`.`create_time` DESC LIMIT 10 [ RunTime:0.087603s ]
SHOW FULL COLUMNS FROM `jrk_tagrecords` [ RunTime:0.002297s ]
SELECT * FROM `jrk_tagrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 20 [ RunTime:0.001937s ]
SHOW FULL COLUMNS FROM `jrk_member` [ RunTime:0.002233s ]
SELECT `id`,`username`,`userhead`,`usertime` FROM `jrk_member` WHERE `status` = 1 ORDER BY `usertime` DESC LIMIT 10 [ RunTime:0.003673s ]
SHOW FULL COLUMNS FROM `jrk_searchrecords` [ RunTime:0.002018s ]
SELECT * FROM `jrk_searchrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 5 [ RunTime:0.003411s ]
SELECT aid,title,count(aid) as c FROM `jrk_downrecords` GROUP BY `aid` ORDER BY `c` DESC LIMIT 10 [ RunTime:0.014912s ]
SHOW FULL COLUMNS FROM `jrk_articles` [ RunTime:0.002395s ]
UPDATE `jrk_articles` SET `hits` = 1 WHERE `id` = 129758 [ RunTime:0.001276s ]
