用于FPGA的反Z变换算法的Verilog代码。可用于JPEG及MPEG压缩算法。-FPGA for the anti-Z transform algorithm of Verilog code. Can be used in JPEG and MPEG compression algorithms.
SHOW FULL COLUMNS FROM `jrk_downrecords` [ RunTime:0.001329s ]
SELECT `a`.`aid`,`a`.`title`,`a`.`create_time`,`m`.`username` FROM `jrk_downrecords` `a` INNER JOIN `jrk_member` `m` ON `a`.`uid`=`m`.`id` WHERE `a`.`status` = 1 GROUP BY `a`.`aid` ORDER BY `a`.`create_time` DESC LIMIT 10 [ RunTime:0.091876s ]
SHOW FULL COLUMNS FROM `jrk_tagrecords` [ RunTime:0.001255s ]
SELECT * FROM `jrk_tagrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 20 [ RunTime:0.001901s ]
SHOW FULL COLUMNS FROM `jrk_member` [ RunTime:0.001228s ]
SELECT `id`,`username`,`userhead`,`usertime` FROM `jrk_member` WHERE `status` = 1 ORDER BY `usertime` DESC LIMIT 10 [ RunTime:0.003601s ]
SHOW FULL COLUMNS FROM `jrk_searchrecords` [ RunTime:0.001046s ]
SELECT * FROM `jrk_searchrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 5 [ RunTime:0.003350s ]
SELECT aid,title,count(aid) as c FROM `jrk_downrecords` GROUP BY `aid` ORDER BY `c` DESC LIMIT 10 [ RunTime:0.014313s ]
SHOW FULL COLUMNS FROM `jrk_articles` [ RunTime:0.001415s ]
UPDATE `jrk_articles` SET `hits` = 1 WHERE `id` = 123664 [ RunTime:0.001320s ]
