本设计的基本要求是以复杂可编程逻辑器件CPLD为基础，通过在EDA系统软件ispDesignExpert System 环境下进行数字系统设计，熟练掌握该环境下的功能仿真，时间仿真，管脚锁定和芯片下载。 本系统基本上比较全面的模拟了计数式数字频率计，广泛应用于工业、民用等各个领域，具有一定的开发价值。
SHOW FULL COLUMNS FROM `jrk_downrecords` [ RunTime:0.001299s ]
SELECT `a`.`aid`,`a`.`title`,`a`.`create_time`,`m`.`username` FROM `jrk_downrecords` `a` INNER JOIN `jrk_member` `m` ON `a`.`uid`=`m`.`id` WHERE `a`.`status` = 1 GROUP BY `a`.`aid` ORDER BY `a`.`create_time` DESC LIMIT 10 [ RunTime:0.087647s ]
SHOW FULL COLUMNS FROM `jrk_tagrecords` [ RunTime:0.001236s ]
SELECT * FROM `jrk_tagrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 20 [ RunTime:0.001875s ]
SHOW FULL COLUMNS FROM `jrk_member` [ RunTime:0.001230s ]
SELECT `id`,`username`,`userhead`,`usertime` FROM `jrk_member` WHERE `status` = 1 ORDER BY `usertime` DESC LIMIT 10 [ RunTime:0.003622s ]
SHOW FULL COLUMNS FROM `jrk_searchrecords` [ RunTime:0.001046s ]
SELECT * FROM `jrk_searchrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 5 [ RunTime:0.003248s ]
SELECT aid,title,count(aid) as c FROM `jrk_downrecords` GROUP BY `aid` ORDER BY `c` DESC LIMIT 10 [ RunTime:0.014383s ]
SHOW FULL COLUMNS FROM `jrk_articles` [ RunTime:0.001281s ]
UPDATE `jrk_articles` SET `hits` = 1 WHERE `id` = 382112 [ RunTime:0.001291s ]
