资 源 简 介
Sample behavioral waveforms for design file sin_rom.vThe following waveforms show the behavior of altsyncram megafunction for the chosen set of parameters in design sin_rom.v. For the purpose of this simulation, the contents of the memory at the start of the sample waveforms is assumed to be ( 3F0, 3F1, 3F2, 3F3, ...). The design sin_rom.v has one read port. The read port has 1024 words of 10 bits each. The output of the read port is unregistered. Fig. 1 : Wave showing read operation. The above waveform shows the behavior of the design under normal read conditions. The read happens at the rising edge of the enabled clock cycle. The output from the RAM is undefined until
文 件 列 表
基于DDS的DA正弦波输出
incremental_db
db
adder_32.v
DDS.v
DDS.v.bak
DDS_sin.asm.rpt
DDS_sin.done
DDS_sin.dpf
DDS_sin.fit.rpt
DDS_sin.fit.smsg
DDS_sin.fit.summary
DDS_sin.flow.rpt
DDS_sin.jdi
DDS_sin.map.rpt
DDS_sin.map.summary
DDS_sin.pin
DDS_sin.pof
DDS_sin.qpf
DDS_sin.qsf
DDS_sin.qws
DDS_sin.sof
DDS_sin.tan.rpt
DDS_sin.tan.summary
DDS_sin.v
DDS_sin.v.bak
reg32.v
sin.mif
sin_rom.cmp
sin_rom.inc
sin_rom.qip
sin_rom.v
sin_rom_bb.v
sin_rom_wave0.jpg
sin_rom_waveforms.html
TLC615.v
TLC615.v.bak
