一个嵌入式RISC CPU 的Verilog 设计源码，可综合。内含详细的设计文挡。-an embedded RISC CPU design Verilog source code can be integrated. Detailed design containing the text block.
SHOW FULL COLUMNS FROM `jrk_downrecords` [ RunTime:0.002108s ]
SELECT `a`.`aid`,`a`.`title`,`a`.`create_time`,`m`.`username` FROM `jrk_downrecords` `a` INNER JOIN `jrk_member` `m` ON `a`.`uid`=`m`.`id` WHERE `a`.`status` = 1 GROUP BY `a`.`aid` ORDER BY `a`.`create_time` DESC LIMIT 10 [ RunTime:0.086105s ]
SHOW FULL COLUMNS FROM `jrk_tagrecords` [ RunTime:0.002369s ]
SELECT * FROM `jrk_tagrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 20 [ RunTime:0.001932s ]
SHOW FULL COLUMNS FROM `jrk_member` [ RunTime:0.002226s ]
SELECT `id`,`username`,`userhead`,`usertime` FROM `jrk_member` WHERE `status` = 1 ORDER BY `usertime` DESC LIMIT 10 [ RunTime:0.003698s ]
SHOW FULL COLUMNS FROM `jrk_searchrecords` [ RunTime:0.002239s ]
SELECT * FROM `jrk_searchrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 5 [ RunTime:0.003358s ]
SELECT aid,title,count(aid) as c FROM `jrk_downrecords` GROUP BY `aid` ORDER BY `c` DESC LIMIT 10 [ RunTime:0.014418s ]
SHOW FULL COLUMNS FROM `jrk_articles` [ RunTime:0.002351s ]
UPDATE `jrk_articles` SET `hits` = 1 WHERE `id` = 322238 [ RunTime:0.001246s ]
