资 源 简 介
用FPGA模拟VGA时序、模拟PS/2总线的键盘接口VHDL源代码，基于Xilinx spartan3-VGA FPGA timing simulation, simulation PS/2 keyboard interface bus VHDL source code, Based on Xilinx spartan3
文 件 列 表
S3Demo
__projnav
_ngo
xst
automake.log
bitgen.ut
coregen.log
coregen.prj
kb2vhdl.vhd
README.txt
README.txt~
s3demo.bgn
s3demo.bit
s3demo.bld
s3demo.cmd_log
S3demo.dhp
s3demo.drc
S3demo.lfp
s3demo.lso
S3demo.mcs
s3demo.mrp
s3demo.nc1
s3demo.ncd
s3demo.ngc
s3demo.ngd
s3demo.ngm
s3demo.ngr
S3demo.npl
s3demo.pad
s3demo.pad_txt
s3demo.par
s3demo.pcf
s3demo.placed_ncd_tracker
s3demo.prj
S3demo.prm
s3demo.routed_ncd_tracker
S3demo.sig
s3demo.stx
s3demo.syr
s3demo.twr
s3demo.twx
S3demo.ucf
S3demo.ucf.untf
s3demo.ut
S3demo.vhd
s3demo.xpi
s3demo_cclktemp.bit
s3demo_last_par.ncd
s3demo_map.ncd
s3demo_map.ngm
s3demo_pad.csv
s3demo_pad.txt
vga_main.vhd
_impact.cmd
_impact.log
_pace.ucf
__projnav.log
