文 件 列 表
DOC
作成資料
examination.xls
~$signbook.doc
~WRL3884.tmp
designbook.doc
SIM
tb
tb_ptn
work
tb_00.do
vsim.wlf
tb_01.do
tb_02.do
tb_09.do
tb_03.do
tb_04.do
tb_05.do
tb_06.do
tb_07.do
tb_08.do
wave_09.do
compile.do
wave_00.do
vish_stacktrace.vstf
wave_01.do
wave_02.do
wave_03.do
wave_04.do
wave_05.do
wave_06.do
wave_07.do
wave_08.do
RTL
toppart.vhd
clkpart.VHD
readpart.VHD
writepart.vhd
M1
romfile
ucf
bitfile
report
macro
project
