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Part III
Figure 2a shows a circuit for a full adder, which has the inputs a, b, and ci, and produces the outputs s and co.
Parts b and c of the figure show a circuit symbol and truth table for the full adder, which produces the two-bit
binary sum cos = a + b + ci. Figure 2d shows how four instances of this full adder entity can be used to design
a circuit that adds two four-bit numbers. This type of circuit is usually called a ripple-carry adder, because of
the way that the carry signals are passed from one full adder to the next. Write VHDL code that implements this
circuit, as described below.
2
文 件 列 表
part3
incremental_db
db
lab2part3.asm.rpt
lab2part3.done
lab2part3.fit.rpt
lab2part3.fit.summary
lab2part3.flow.rpt
lab2part3.map.rpt
lab2part3.map.summary
lab2part3.pin
lab2part3.pof
lab2part3.qpf
lab2part3.qsf
lab2part3.qsf.bak
lab2part3.qws
lab2part3.sof
lab2part3.tan.rpt
lab2part3.tan.summary
lab2part3.vhd
lab2part3.vhd.bak
