文 件 列 表
LDPC-FPGA+MATLAB
add_m_seq.bsf
add_m_seq.v
add_m_seq.vwf
clk_5div_1.bsf
clk_5div_1.vhd
cmp_state.ini
cnt25.bsf
cnt25.v
cnt40.bsf
cnt40.v
cnt40.vwf
cnu_5.v
cnu_5.vwf
cnu_6.v
cnu_6.vwf
databuffer.bsf
databuffer.v
databuffer.vwf
datain_encode.bsf
datain_encode.mif
datain_encode.v
datain_encode_bb.v
db
decode.080414.vwf
decode.asm.rpt
decode.bsf
decode.done
decode.eda.rpt
decode.fit.eqn
decode.fit.rpt
decode.fit.summary
decode.fld
decode.flow.rpt
decode.map.eqn
decode.map.rpt
decode.map.summary
decode.pin
decode.pof
decode.ppl
decode.qpf
decode.qsf
decode.qws
decode.sim
decode.sim.rpt
decode.sim.tbl
decode.sim.vwf
decode.sim1.vwf
decode.sof
decode.tan.rpt
decode.tan.summary
decode.v
decode.vec
decode.vwf
decode1.vwf
decode2.vwf
decode_assignment_defaults.qdf
disperse_to_continuous.bdf
disperse_to_continuous.bsf
disperse_to_continuous.vwf
disperse_to_continuous_1.bsf
disperse_to_continuous_1.v
disposal.bsf
disposal.v
generate_m_seq.v
generate_m_seq.vwf
g_mseq.v
h.bsf
h.mif
h.v
hd0.bsf
hd0.mif
hd0.v
hd0_bb.v
hd1.bsf
hd1.mif
hd1.v
hd1_bb.v
hd2.bsf
hd2.mif
hd2.v
hd2_bb.v
hd3.bsf
hd3.mif
hd3.v
hd3_bb.v
h_bb.v
h_rom.bdf
h_rom.bsf
h_rom.vwf
h_rom1.bdf
initial_short.mif
initial_system.bsf
initial_system.v
initial_system.vwf
lpm0.bsf
lpm0.cmp
lpm0.v
lpm00.v
lpm0_bb.v
lpm1.cmp
lpm1.v
lpm11.v
lpm11.vwf
lpm1_bb.v
luta.mif
lutb.mif
parta0.v
parta0.vwf
quartus_nativelink_simulation.log
simulation
stp2.stp
top.bdf
top.bsf
top.v
top.vwf
transcript
vnu_1.v
vnu_1.vwf
vnu_2.v
vnu_2.vwf
vnu_4.v
vnu_4.vwf
work
