资 源 简 介
xilinx CTC IPcore(encoder 和 decoder)的测试，经过AWGN信道。 -This simulation uses a AWGN module to include noise as part of the simulation. Prior to
running the simulation, the UniSim models for the encoder and decoder must be generated as
well as the AWGN module.
文 件 列 表
hwitl_sim
bit_counter.vhd
bpsk.m
clk_counter.vhd
clockgen.vhd
ctc_ber.vhd
ctc_ber_shell.vhd
ctc_ber_shell_config.m
data_counter.vhd
enc_strobe.vhd
err_counter.vhd
generate_ber.m
generate_TCC16eBer.m
getedit.m
getpopup.m
partoser.vhd
puncture_gen.vhd
quantize.vhd
RAMB16_S4096X4.vhd
RAMB16_S8192X2.vhd
RAMB16_S8192Xd.vhd
reset_counter.vhd
rloc_package.vhd
sertopar.vhd
TCC16eBerDemo.fig
TCC16eBerDemo.m
tcc16e_ber_shell.vhd
tcc16e_ber_test.mdl
tcc16e_ber_test_ml506.mdl
