基于FPGA的VHDL编程实现各种音频信号，采用的是周立功公司的fusion_startkit开发板。-FPGA-based VHDL Programming realize a variety of audio signals, are used by companies fusion_startkit weeks Ligong development board.
SHOW FULL COLUMNS FROM `jrk_downrecords` [ RunTime:0.001474s ]
SELECT `a`.`aid`,`a`.`title`,`a`.`create_time`,`m`.`username` FROM `jrk_downrecords` `a` INNER JOIN `jrk_member` `m` ON `a`.`uid`=`m`.`id` WHERE `a`.`status` = 1 GROUP BY `a`.`aid` ORDER BY `a`.`create_time` DESC LIMIT 10 [ RunTime:0.094336s ]
SHOW FULL COLUMNS FROM `jrk_tagrecords` [ RunTime:0.001234s ]
SELECT * FROM `jrk_tagrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 20 [ RunTime:0.001928s ]
SHOW FULL COLUMNS FROM `jrk_member` [ RunTime:0.001246s ]
SELECT `id`,`username`,`userhead`,`usertime` FROM `jrk_member` WHERE `status` = 1 ORDER BY `usertime` DESC LIMIT 10 [ RunTime:0.003665s ]
SHOW FULL COLUMNS FROM `jrk_searchrecords` [ RunTime:0.001055s ]
SELECT * FROM `jrk_searchrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 5 [ RunTime:0.003200s ]
SELECT aid,title,count(aid) as c FROM `jrk_downrecords` GROUP BY `aid` ORDER BY `c` DESC LIMIT 10 [ RunTime:0.014810s ]
SHOW FULL COLUMNS FROM `jrk_articles` [ RunTime:0.001374s ]
UPDATE `jrk_articles` SET `hits` = 1 WHERE `id` = 194937 [ RunTime:0.001196s ]
