用Bresenham算法在FPGA上实现小数分频器，verilog编写，计算机图形法-Bresenham algorithm used in the FPGA to achieve a small number of crossovers, verilog preparation, computer graphics method
SHOW FULL COLUMNS FROM `jrk_downrecords` [ RunTime:0.001157s ]
SELECT `a`.`aid`,`a`.`title`,`a`.`create_time`,`m`.`username` FROM `jrk_downrecords` `a` INNER JOIN `jrk_member` `m` ON `a`.`uid`=`m`.`id` WHERE `a`.`status` = 1 GROUP BY `a`.`aid` ORDER BY `a`.`create_time` DESC LIMIT 10 [ RunTime:0.098742s ]
SHOW FULL COLUMNS FROM `jrk_tagrecords` [ RunTime:0.001108s ]
SELECT * FROM `jrk_tagrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 20 [ RunTime:0.001861s ]
SHOW FULL COLUMNS FROM `jrk_member` [ RunTime:0.001250s ]
SELECT `id`,`username`,`userhead`,`usertime` FROM `jrk_member` WHERE `status` = 1 ORDER BY `usertime` DESC LIMIT 10 [ RunTime:0.004120s ]
SHOW FULL COLUMNS FROM `jrk_searchrecords` [ RunTime:0.001416s ]
SELECT * FROM `jrk_searchrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 5 [ RunTime:0.003434s ]
SELECT aid,title,count(aid) as c FROM `jrk_downrecords` GROUP BY `aid` ORDER BY `c` DESC LIMIT 10 [ RunTime:0.014907s ]
SHOW FULL COLUMNS FROM `jrk_articles` [ RunTime:0.001315s ]
UPDATE `jrk_articles` SET `hits` = 1 WHERE `id` = 147844 [ RunTime:0.001323s ]
