文 件 列 表
DE2_TV_m_write
Sdram_Control_4Port
de2_tv2_0_map
de2_tv2
db
ce_temp_directory
avl_m_w_sim
avl_m_w_generation_script
.sopc_builder
install.ptf
AUDIO_DAC.v
avl_m_w.bsf
avl_m_w.ptf
avl_m_w.v
avl_m_w_log.txt
avl_m_w_setup_quartus.tcl
cpu_0.v
cpu_0_bht_ram.mif
cpu_0_dc_tag_ram.mif
cpu_0_ic_tag_ram.mif
cpu_0_jtag_debug_module.v
cpu_0_jtag_debug_module_wrapper.v
cpu_0_mult_cell.v
cpu_0_ociram_default_contents.mif
cpu_0_rf_ram_a.mif
cpu_0_rf_ram_b.mif
cpu_0_test_bench.v
DE2_TV.asm.rpt
DE2_TV.done
DE2_TV.dpf
DE2_TV.fit.rpt
DE2_TV.fit.smsg
DE2_TV.fit.summary
DE2_TV.flow.rpt
DE2_TV.jdi
DE2_TV.map.rpt
DE2_TV.map.smsg
DE2_TV.map.summary
DE2_TV.pin
DE2_TV.pof
DE2_TV.qpf
DE2_TV.qsf
DE2_TV.qws
DE2_TV.sof
DE2_TV.tan.rpt
DE2_TV.tan.summary
DE2_TV.v
DE2_TV1.v
DE2_TV2.v
de2_tv2_0.v
DE2_TV_assignment_defaults.qdf
DIV.v
I2C_AV_Config.v
I2C_Controller.v
ITU_656_Decoder.v
jtag_uart_0.v
Line_Buffer.v
MAC_3.v
PLL.v
qq_wave0.jpg
qq_wave1.jpg
qq_waveforms.html
Reset_Delay.v
sdram_0.v
sdram_0_test_component.v
sdram_control.v
SDRAM_PLL.v
SEG7_LUT.v
SEG7_LUT_8.v
sopc_builder_debug_log.txt
stp1.stp
system_Reset.v
TD_Detect.v
TP_RAM.v
VGA_Ctrl.v
write_FIFO1.v
YCbCr2RGB.v
YUV422_to_444.v
.sopc_builder
