资 源 简 介
这是一个VHDL（硬件描述语言）的编译器，更确切说是一个解释器，输入是VHDL语言，输出是经过提到后的符号表，也就是将VHDL中的重要变量比如输入输出变量和DFF等保存下来。-This is a VHDL (hardware description language) compiler, more precise explanation is a device that is VHDL input, output was mentioned after the symbol table to VHDL is the important variables such as input and output variables and other DFF preserved.
