Verilog&Vhdl混语言对SDRAM的控制源代码，提供了很好的例子，顶层文件为sdrm.v！-VerilogVhdl mixed language SDRAM control of the source code, provided a good example of top-level documents sdrm.v!
SHOW FULL COLUMNS FROM `jrk_downrecords` [ RunTime:0.001391s ]
SELECT `a`.`aid`,`a`.`title`,`a`.`create_time`,`m`.`username` FROM `jrk_downrecords` `a` INNER JOIN `jrk_member` `m` ON `a`.`uid`=`m`.`id` WHERE `a`.`status` = 1 GROUP BY `a`.`aid` ORDER BY `a`.`create_time` DESC LIMIT 10 [ RunTime:0.086823s ]
SHOW FULL COLUMNS FROM `jrk_tagrecords` [ RunTime:0.001242s ]
SELECT * FROM `jrk_tagrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 20 [ RunTime:0.001945s ]
SHOW FULL COLUMNS FROM `jrk_member` [ RunTime:0.001143s ]
SELECT `id`,`username`,`userhead`,`usertime` FROM `jrk_member` WHERE `status` = 1 ORDER BY `usertime` DESC LIMIT 10 [ RunTime:0.003649s ]
SHOW FULL COLUMNS FROM `jrk_searchrecords` [ RunTime:0.000993s ]
SELECT * FROM `jrk_searchrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 5 [ RunTime:0.003286s ]
SELECT aid,title,count(aid) as c FROM `jrk_downrecords` GROUP BY `aid` ORDER BY `c` DESC LIMIT 10 [ RunTime:0.014612s ]
SHOW FULL COLUMNS FROM `jrk_articles` [ RunTime:0.001244s ]
UPDATE `jrk_articles` SET `hits` = 1 WHERE `id` = 119303 [ RunTime:0.001488s ]
